Method for fabricating thin film transistor

Fishing – trapping – and vermin destroying

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437 21, 437 35, 148DIG150, H01L 2186

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active

055478832

ABSTRACT:
A thin film transistor having increased channel length and self-aligned source and drain regions is fabricated by forming a gate electrode on an insulation film disposed on a substrate. Portions of the insulation film are then etched on opposite sides of the gate electrode, as well as beneath part of the gate electrode. A gate insulation film is then formed on the entire exposed surface of the gate electrode, and a semiconductor layer is then formed on the entire gate insulation film, as well as portions of the insulation film. Doping impurities may then be implanted at an angle other than 90.degree. to the surface of the substrate to achieve a thin film transistor having an extended channel length but occupying a relatively small area on the surface of the substrate.

REFERENCES:
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patent: 5039621 (1991-08-01), Pollack
patent: 5158901 (1991-10-01), Kosa et al.
patent: 5177661 (1993-01-01), Zavracky et al.
patent: 5214295 (1993-05-01), Manning
patent: 5283455 (1994-02-01), Inoue et al.
patent: 5334862 (1994-08-01), Manning et al.
patent: 5403761 (1995-04-01), Rha

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