Logic circuit including variable impedance means

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307451, H03K 1901

Patent

active

052065464

ABSTRACT:
A SPL (or Super Push-pull Logic) circuit is provided which includes: a first variable resistor circuit connected between the collector of an input transistor and a first supply voltage terminal (GND) a second variable resistor circuit connected between the emitter of the input transistor and a second supply voltage terminal (V.sub.EE) and a push-pull output circuit. The second variable resistor circuit includes an N-channel MOSFET which has its gate electrode made receptive of any of the output signals of the SPL circuit, a differentiated signal of the output signal, and an inverted signal of the input signal.

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patent: 4746817 (1988-05-01), Banker et al.
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patent: 4999520 (1991-03-01), Usami et al.
patent: 4999523 (1991-03-01), Chan et al.
patent: 5003199 (1991-03-01), Chuang et al.
patent: 5006731 (1991-04-01), Denda
patent: 5059836 (1991-10-01), Lee et al.

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