Device for computing a digital transform of a signal

Details Device for computing a digital transform of a signal Device for computing a digital transform of a signal

1987-09-04

1989-05-16

Harkcom, Gary V.

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G06F 738

Patent

active

048315745

ABSTRACT:
Most of the useful discrete transforms of a signal X represented by N binary samples x0 . . . , xi . . . , x.sub.N-1 (Where N is a power of two) are such that, by combining the samples for obtaining the sum and the difference of couples of samples, the transforms may be converted into two transforms of half-length one of which may again be decomposed into two transforms of half-length. A device for computing such a discrete transform, for instance a discrete cosine transform (DCT) comprises a set of elementary circuits operating in serial arithmetic connected to receive the samples and arranged to provide the sums and differences of couples of the input samples on respective outputs; An additional circuit has inputs connected to the outputs of the elementary circuits for receiving the differences between couples of the input samples and for directly computing one of the two of the samples of the transform in distributed arithmetic. Another computing circuit distinct and different from the additional circuit has inputs connected to the elementary circuits and computes the remaining samples of the transform from the sums.

REFERENCES:
patent: 4385363 (1983-05-01), Widergren et al.
patent: 4449194 (1984-05-01), Wilhelm
patent: 4675836 (1987-06-01), Arnould et al.
patent: 4754491 (1988-06-01), Mischler et al.
IEEE Transactions on Computers, vol. 19, No. 9, Sep. 1972, pp. 1026-1027, New York, U.S.; V. J. Rechrt: "Signal flow graph and a fortran program for Haar-Fourier transform".
IEEE Transactions on Computers, vol. C-32, No. 12, Dec. 1983, pp. 1128-1136, IEEE, New York, U.S.; Chow et al: "A pipelined distributed arithmetic PFFT processor".

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