Fishing – trapping – and vermin destroying
Patent
1996-12-23
1998-01-06
Dang, Trung
Fishing, trapping, and vermin destroying
437 40GS, 437 40SW, 437 41SW, 437228SW, H01L 21265
Patent
active
057054142
ABSTRACT:
A gate electrode for an MOS structure, such as a short-channel MOS transistor, is produced. First, a hard mask is created, using a spacer of the material of the gate electrode as the etching mask, and the hard mask is used to structure the gate electrode. The method is suitable particularly for the production of gate electrodes with very thin gate dielectrics with channel lengths below 100 nm.
REFERENCES:
patent: 4358340 (1982-11-01), Fu
patent: 5202272 (1993-04-01), Hsieh et al.
"Method for Making Submicron Dimensions in Structures Using Sidewall Image Transfer Techniques", Johnson et al., IBM Technical Disclosure Bulletin, vol. 26, No. 9, Feb. 1984, pp. 4587-4589.
Dang Trung
Greenberg Laurence A.
Lerner Herbert L.
Siemens Aktiengesellschaft
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