MOS input protection structure

Electricity: electrical systems and devices – Safety and protection of systems and devices – Transient responsive

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307200B, 307304, 357 41, H02H 720, H02H 904

Patent

active

040578445

ABSTRACT:
A breakdown preventing protection structure for an insulated gate field effect semiconductor device is disclosed for limiting input voltages to levels not substantially exceeding the supply voltage. A planar insulated gate field effect protection transistor is provided in series with the input. The protection transistor includes a source forming the circuit input, a drain connected to the gate of the device to be protected, and a gate electrode connected to the supply voltage which also supplies the device to be protected. A shunting protective diode may be included at the source of the protection transistor to limit negative input voltages to the diode threshold voltage and positive input voltages to the reverse avalanche breakdown of the protective diode. The protection circuit is particularly well suited to protect V-groove metal oxide semiconductor devices which have breakdown voltages well below breakdown voltages of conventional planar MOS transistor devices.

REFERENCES:
patent: 3395290 (1968-07-01), Farina et al.
patent: 3408511 (1968-10-01), Bergersen et al.
patent: 3924265 (1975-12-01), Rodgers
patent: 3934159 (1976-01-01), Nomiya et al.

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