Method and apparatus for providing an enhanced programmable prio

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395742, G06F 946

Patent

active

055112005

ABSTRACT:
An improved APIC controller which utilizes an improved addressing mechanism for interrupts which provides an additional bit position for priority values so that thirty-two levels of priority may be furnished at sequential addresses within an interrupt vector table in memory. In one embodiment, circuitry is furnished which allows the alternative implementation of either a prior art addressing mechanism or the improved addressing mechanism.

REFERENCES:
patent: 5101497 (1992-03-01), Culley et al.
patent: 5261107 (1993-11-01), Klim et al.
patent: 5283904 (1994-02-01), Carson et al.
patent: 5410710 (1995-04-01), Sarangdhar

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