Method for interrupting one computer by another utilizing interr

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395478, 395479, 395726, 364DIG1, 3642448, 3642468, G06F 15167

Patent

active

055111793

ABSTRACT:
A plurality of computers or buses share a common memory system having a common memory, a plurality of front end circuits corresponding to the plurality of computers or buses, an internal logic circuit and internal address and memory buses. The plurality of computers or buses use certain locations in common memory to lock other computers or buses and to determine priority. The internal logic circuit generates hardware interrupts and synchronizes signals coming in through the front end circuits with the internal clock.

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patent: 4805106 (1989-02-01), Pfeifer
patent: 5050072 (1991-09-01), Earnshaw et al.
patent: 5263150 (1993-11-01), Chai-I
patent: 5297260 (1994-03-01), Kametani
Wyland, David C., "Dual-Port Rams Simplify Communication in Computer Systems," Application Note AN-02, Integrated Device Technology, Inc., 1986, pp. 1-10.
"CMOS Dual Port Ram," Preliminary Specification, IDT7130S, Integrated Device Technology, Inc., 1985, pp. 1-87, 1-74-1-75.

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