Method and apparatus for correlating logic analyzer state captur

Details Method and apparatus for correlating logic analyzer state captur Method and apparatus for correlating logic analyzer state captur

1996-09-03

1998-04-07

Beausoliel, Jr., Robert W.

39518318, 3951851, G06F 1122

Patent

active

057375208

ABSTRACT:
Methods and associated apparatus for analyzing and presenting captured state logic data including memory accesses by an intelligent I/O interface device and an attached computer system. The data analysis and display of the present invention aids an engineer in locating data corruption failures in a system. The heuristic analysis of the methods of the present invention locate and identify buffers accessed within the captured state logic data and buffer descriptors accessed within the captured state logic data despite the time dispersion thereof. The buffers and buffer descriptors located and identified within the captured state logic data are displayed on a computer display screen in a manner to more effectively assist an engineer in locating a root cause of data corruption than was possible with prior methods devoid of the analysis of the present invention. In particular, the display visually identifies buffers regardless of the state/time dispersion in the original captured state logic data and distinguishes read access from write access thereto. The display includes indicia used to associate a located and identified buffer descriptor with the identified buffer to which it refers. In response to user requests, the data contained in a selected buffer or selected buffers may be textually displayed either in a raw form or in accordance with the protocol specifications of the underlying data exchange application being debugged. The identified buffers may also be easily searched for a user specified string without concern for the time dispersion of the buffers in the captured state logic data.

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