Semiconductor memory having internal test circuit

Details Semiconductor memory having internal test circuit Semiconductor memory having internal test circuit

1992-08-06

1995-10-10

Beausoliel, Jr., Robert W.

Excavating

324210, 365201, G11C 2900

Patent

active

054576962

ABSTRACT:
A random access semiconductor memory having an array of memory cells is provided with an internal test circuit for testing the contents of rows of stored test pattern data which are read from the array in units of data rows, each read from an entire row of cells of the array. The test circuit can be based on a set of transistors which are respectively coupled to the bit lines of the cell array, for detecting coincidence between the states of all of the bits of a data row that is read out, or coincidence between the states of a predetermined set of the row bits.

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patent: 4464750 (1984-08-01), Tatematsu
patent: 4654827 (1987-03-01), Childers
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patent: 4868823 (1989-09-01), White, Jr.
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patent: 5060230 (1991-10-01), Arimoto
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patent: 5185744 (1993-02-01), Arimoto
patent: 5216678 (1993-06-01), Nawaki
patent: 5311473 (1994-05-01), McClure

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