Simple temporary information storage circuit controllable with e

Details Simple temporary information storage circuit controllable with e Simple temporary information storage circuit controllable with e

1994-07-29

1996-04-23

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518905, G11C 800

Patent

active

055110347

ABSTRACT:
Only a flip flop circuit (11a), an n-channel enhancement type transfer transistor (Qn11) coupled between an input node and the flip flop (11a) and a p-channel enhancement type reset transistor (Qp12) coupled between a power voltage line (Vcc) and the flip flop circuit (11a) form in combination a temporary information storage circuit, and the n-channel enhancement type transfer transistor (Qn11) and the p-channel enhancement type reset transistor (Qp12) are respectively controlled by a latch control signal (CTL2) and an enable/reset signal (EBL2) for changing the status of the flip flop circuit.

REFERENCES:
patent: 4951259 (1990-08-01), Sato et al.
patent: 5128897 (1992-07-01), McClure
patent: 5357479 (1994-10-01), Matsui
patent: 5373479 (1994-12-01), Noda
Patent Abstracts of Japan; vol. 10, No. 283 (E-440 (2339); Sep. 26, 1986; JP-A-61 101 113 (Toshiba) May 20, 1986; abstract.
Patent Abstracts of Japan; vol. 9, No. 208 (E-338 (1931); Aug. 24, 1985; JP-A-60 070 817 (Hitachi) Apr. 22, 1985; abstract.

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