Process for manufacturing a Schottky FET device using metal side

Details Process for manufacturing a Schottky FET device using metal side Process for manufacturing a Schottky FET device using metal side

1986-03-26

1988-03-08

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437176, 437 50, 437 58, 437178, 437200, 437245, 437984, 437912, 437 44, 357 233, 357 22, 357 15, H01L 21225, H01L 2980, H01L 2972

Patent

active

047299665

ABSTRACT:
A first insulative film is formed with predetermined height and thickness in a loop shape on the surface of the Schottky-junction semiconductor substrate. A gate electrode metal film is formed with a predetermined height and thickness in a loop shape on the surface of the substrate along the inner surface of the first insulative film. A second insulative film is formed with a predetermined height and thickness in a loop shape on the surface of the substrate along the inner surface of the metal film. A channel consisting of a low concentration impurity layer, is formed in a loop shape inside the substrate directly under the metal film and the first and second insulative films. The source region consists of a high-concentration impurity layer formed such that it surrounds the channel positioned inside the substrate on the outside of the first insulative film. The drain region consists of a high-concentration impurity layer, which is formed such that it is surrounded by the channel positioned inside the substrate on the inside of the second insulative film.

REFERENCES:
patent: 3969745 (1976-07-01), Blocker, III
patent: 4194935 (1980-03-01), Dingle et al.
patent: 4322883 (1982-04-01), Abbas et al.
patent: 4389768 (1983-06-01), Fowler et al.
patent: 4409608 (1983-10-01), Yoder
patent: 4425379 (1984-01-01), Vora et al.
patent: 4455738 (1984-06-01), Houston et al.
patent: 4489146 (1984-12-01), Bock et al.
patent: 4498093 (1985-02-01), Allyn et al.
patent: 4521952 (1985-06-01), Riseman
patent: 4532532 (1985-07-01), Jackson
patent: 4566941 (1986-01-01), Yoshida et al.
patent: 4608589 (1986-08-01), Goth et al.
Jadus, "Buried Field Effect Transistor", IBM Tech. Disclosure Bulletin, vol. 13, No. 6, Nov. 1970, pp. 1431-1432.

Affiliated with

Also associated with

Rating

Process for manufacturing a Schottky FET device using metal side does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for manufacturing a Schottky FET device using metal side, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for manufacturing a Schottky FET device using metal side will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-231333