Fishing – trapping – and vermin destroying
Patent
1992-01-10
1993-07-13
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
257536, H01L 2170, H01L 2700
Patent
active
052273270
ABSTRACT:
An integrated circuit having MIS transistors pull-up and pull-down gate input resistors of a sufficient high resistance. The high resistance values are obtained in spite of using self-aligned refractory metal silicide films by redefining available channel stoppers to form the respective first terminals of the resistors and a contact region in a lightly doped substrate or well region to form the respective second terminals of the resistors.
REFERENCES:
patent: 4189739 (1980-02-01), Copeland, III
patent: 4830976 (1989-05-01), Morris et al.
patent: 4893159 (1990-01-01), Suzuki et al.
Chaudhuri Olik
Pham Long
Seiko Epson Corporation
Tsiang Harold T.
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