Method for forming MOS transistors

Details Method for forming MOS transistors Method for forming MOS transistors

1992-06-15

1993-07-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 29, 437 34, 437 36, 437913, 148DIG82, 148DIG143, H01L 21265

Patent

active

052273210

ABSTRACT:
A method for implanting diffusion regions during production of MOS transistors involves first patterning and etching a gate to produce a resist overhang covering at least one edge of the gate. Primary dopant is then implanted in the substrate to produce a first diffusion region having at least one boundary partially defined by the resist overhang covering the gate. By isotropically etching the resist on the gate, the gate itself is used as a mask during subsequent implantation of a halo diffusion region. The size of both the first diffusion region and the halo diffusion region is subsequently adjusted by annealing.

REFERENCES:
patent: Re32800 (1988-12-01), Han et al.
patent: 3940288 (1976-02-01), Takagi et al.
patent: 4149904 (1979-04-01), Jones
patent: 4182023 (1980-01-01), Cohen et al.
patent: 4198250 (1980-04-01), Jecmen
patent: 4319395 (1982-03-01), Lund et al.
patent: 4616399 (1986-10-01), Ooka
patent: 4933994 (1990-06-01), Orbon
Sze, "Semiconductor devices physics and technology", 1985, p. 159.
Howes et al., "Gallium Arsenide Materials, Devices, and Circuits", 1985, p. 282.

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