Memory bank comparator system

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395400, 3642464, G06F 1206

Patent

active

052416658

ABSTRACT:
A memory bank comparator system in a memory system including a plurality of memory banks determines, on a cycle-by-cycle basis, whether a memory address is valid, which one of the memory banks is being addressed, the type of memory bank being addressed, and whether memory bank interleaving is possible. The memory bank comparator system includes a factor assignor which provides a factor for each of the memory banks corresponding to the maximum number of storage locations within each bank, an adder for adding the factors together to provide a sum for each memory bank corresponding to the maximum number of storage locations within its respective memory bank plus the sum of the maximum number of storage locations of the memory banks which precede it, and an address comparator for comparing the memory address to each sum for providing an output indicating which one of the memory banks is being addressed.

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