Division multiplex packet switching circuit using a circular shi

Multiplex communications – Wide area network – Packet switching

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Details

370 8515, 370 942, H04J 326

Patent

active

049166905

ABSTRACT:
A switching network including one or more switching circuits and a control circuit (CCC), the switching circuit including a time division switching element (SR12-SR78) provided with inputs and outputs for data packets and the switching element being controlled by the control circuit (CCC). This switching element is constituted by a closed loop shift register (SR12-SR78) of which all the stages are controlled by a clock signal (f2) provided by the control circuit (CCC) and form a number of shift register portions (SR12-SR78) which are each (SR12) associated to a parallel input (h12) having access to all stages of this portion. A plurality of inputs (R1/2) of the switching element have access to this parallel input (h12) via a multiplexer (MUX12).

REFERENCES:
patent: 4393497 (1983-07-01), Cantwell, Jr.
patent: 4528661 (1985-07-01), Bahr et al.
patent: 4665517 (1987-05-01), Widmer
patent: 4760570 (1988-07-01), Acampora et al.
patent: 4761780 (1988-08-01), Bingham
patent: 4768190 (1988-08-01), Giancarlo

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