Semiconductor memory

Details Semiconductor memory Semiconductor memory

1990-12-14

1993-08-31

Popek, Joseph A.

Static information storage and retrieval

Format or disposition of elements

365 63, 365154, G11C 502, H01L 2710

Patent

active

052414957

ABSTRACT:
In a stacked CMOS SRAM of this invention, a power source line connected to a load transistor of a flip-flop constituting a memory cell extends above a boundary line between memory cells, and a power source line shunt is formed by the same conductive layer as that of a ground line or a gate electrode of the load transistor.

REFERENCES:
patent: 4541006 (1985-09-01), Ariizumi et al.
patent: 4853894 (1989-08-01), Yamanaka et al.
IEEE Journal of Solid-State Circuits, vol. SC-13, No. 5, Oct. 1978 entitled "DSA 4K Static RAM", by Y. Torimaru et al., pp. 647-650.
IEEE Journal of Solid-State Circuits, Oct. 24, 1989, No. 5, entitled "A 9-ns 1-Mbit CMOS Sram", by K. Sasaki et al., pp. 1219-1225.

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