Fully decoded multistage leading zero detector and normalization

Details Fully decoded multistage leading zero detector and normalization Fully decoded multistage leading zero detector and normalization

1992-01-06

1993-08-31

Malzahn, David H.

Boots, shoes, and leggings

G06F 501

Patent

active

052414906

ABSTRACT:
Multistage leading zero detection is used in a left-shift normalization unit for normalizing floating-point mantissas. Detection of the leading one is accomplished by segmenting the mantissa into non-overlapping segments. The most significant segment containing a non-zero value bit is detected producing a fully decoded output in which an output line is activated corresponding to the segment position within the mantissa where the leading one has been detected. A second level of detection selects the designated most significant segment and detects the position of the most significant non-zero bit within the segment producing a fully decoded output and, in turn, causes the activation of a line within a second set of lines that corresponds to the leading one bit position within the segment. This leading zero two stage detector is combined with a multistage left-shift unit to form a complete left-shift normalization unit in which the multistage fully decoded leading zero detector is used to control the multistage left-shift unit.

REFERENCES:
patent: 4064421 (1977-12-01), Gajski et al.
patent: 4773033 (1988-09-01), Ikumi
patent: 4785421 (1988-11-01), Takahashi et al.
patent: 5091874 (1992-02-01), Watanabe et al.
"Using a Common Barrel Shifter for Operand Normalization, Operand Alignment and Operand Unpack and Pack in Floating Point" IBM Tech. Disclosure Bulletin vol. 29, No. 2, Jul. 1986, pp. 699-701.

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