Patent
1987-07-29
1990-04-10
James, Andrew J.
357 238, 357 22, 357 2312, 357 237, 357 13, H01L 2978, H01L 2990
Patent
active
049165003
ABSTRACT:
The present invention relates to a semiconductor device comprising a semiconductor substrate of a first conductivity type or an insulator, a source comprising an impurity layer of a second conductivity type disposed on said semiconductor substrate or said insulator, a drain comprising an impurity layer of the second conductivity type disposed on said semiconductor substrate or said insulator, an impurity layer of the first conductivity type formed between said source and said drain, a gate formed on said impurity layer of the first conductivity type via an insulation film, and an impurity layer of the second conductivity type having an impurity concentration lower than that of said source and said drain, said impurity layer of the second conductivity type being disposed between said source, said drain and said impurity layer of the first conductivity type, and said semiconductor substrate of the first conductivity type or said insulator.
REFERENCES:
patent: 3595714 (1971-07-01), Thire et al.
patent: 4000504 (1976-12-01), Berger
patent: 4302764 (1981-11-01), Fang et al.
patent: 4393578 (1983-07-01), Cady et al.
patent: 4549193 (1985-10-01), Malhi et al.
Ohwada et al., IEEE Trans. on Elec. Dev., vol. ED-28, No. 9, Sep. 1981, pp. 1084-1087, "A High-Speed . . . Layer".
Sunami et al., IEEE Trans. on Elec. Dev., vol. ED-29, No. 4, Apr. 1982, "Characteristics . . . MOS Device", pp. 607-610.
Hiraishi Atsushi
Minami Masataka
Nagano Takahiro
Watanabe Atsuo
Yazawa Yoshiaki
Hitachi , Ltd.
Jackson, Jr. Jerome
James Andrew J.
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