Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

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Details

257507, 257347, 257622, 257526, H01L 2712

Patent

active

052412113

ABSTRACT:
The substrate in a SOI structure is formed of a material with high heat conductivity, a U groove reaches substrate, the buried material inside the U groove is formed of a material with high heat conductivity, and the buried material is brought into contact with the substrate. With this arrangement, the drop in heat radiation effect can be improved while maintaining the enhancement of the resistance to the soft errors and the reduction of the parasitic capacitance on the bottom surface of the semiconductor element, so that the heat radiation effect can be made to approach the heat radiation effect of a semiconductor device having an insulated isolation region of the conventional U-groove structure. Further, in this case the speed and power product can be made better than the speed and power product of a semiconductor device having an insulated isolation region of the conventional U-groove structure.

REFERENCES:
patent: 4786960 (1988-11-01), Jeuch
patent: 4807012 (1989-02-01), Beasom
patent: 4864375 (1989-09-01), Teng et al.
patent: 4878957 (1989-11-01), Yamaguchi et al.
patent: 4925805 (1990-05-01), Van Ommen et al.
patent: 4951102 (1990-08-01), Beitman et al.
patent: 4982263 (1991-01-01), Spratt et al.
patent: 4983538 (1991-01-01), Gotou
patent: 5072287 (1991-12-01), Nakagawa et al.
Ueno et al., "A Fully Functional 1K ECL RAM on a Bonded SOI Wafer," IEDM Technical Digest, 1988, pp. 870-872.

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