Method of forming a thyristor on an SOI substrate

Fishing – trapping – and vermin destroying

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Other Related Categories

437 21, 437 32, 437 64, H01L 4900

Type

Patent

Status

active

Patent number

052408655

Description

ABSTRACT:
A thyristor (38) is formed over an insulating layer (44). A gate (70) is operable to create a depletion region through the semiconductor layer (46) in which the thyristor (38) is implemented in order to turn the thyristor off. Isolation regions (48, 52) prevent operation of the thyristor from affecting adjacent devices.

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patent: 4990978 (1991-02-01), Kondoh
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patent: 5075737 (1991-12-01), Shinohara
patent: 5077224 (1991-12-01), Schwarzbauer et al.
B. J. Baliga et al., "The MOS Depletion-Mode Thyristor: A New MOS-Controlled Bipolar Power Device", IEEE Electron Device Letters, vol. 9, No. 8, Aug. 1988, pp. 411-413.

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