Multiphase clocking for MOS

Details Multiphase clocking for MOS Multiphase clocking for MOS

1976-08-09

1977-07-19

Malzahn, David H.

Registers

Transfer mechanism

Traveling pawl

364200, G06F 104

Patent

active

040370909

ABSTRACT:
An MOS/LSI semiconductor chip for providing the functions of an electronic calculator or digital processor includes a RAM for data storage, a ROM for program instruction storage, an arithmetic unit for performing operations on data, and control circuitry for defining the functions of the machine in response to instructions from the ROM as well as conditions in the machine and inputs from external. The operation is digit oriented in that in a basic machine cycle one digit of the RAM is accessed. Also, in a machine cycle the ROM is addressed to provide an instruction word, and the word is decoded and executed. A unique five phase clocking arrangement is used which permits the complex operations to be implemented within a machine cycle.

REFERENCES:
patent: 3800129 (1974-03-01), Umstattd
patent: 3863060 (1975-01-01), Rode et al.
patent: 3878514 (1975-04-01), Faber

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