Boots – shoes – and leggings
Patent
1995-05-23
1998-03-24
Mai, Tan V.
Boots, shoes, and leggings
36472417, G06F 1717, G06F 1710
Patent
active
057320020
ABSTRACT:
A digital filtering method that includes sampling an input signal at a first rate, integrating the signal, sampling the integrated version at a different rate, and combining the sampled integrated version with the input signal. The method can include again integrating the integrated version, sampling the twice integrated version at a third rate different from the first and second rates, and combining the twice integrated version with the integrated version and the input signal. The integrated version can be again integrated, the twice integrated version can be sampled at a third rate different from the first and second rates, and the twice integrated version can be combined with the integrated version. A common circuit component can be multiplexed to participate in two integrating steps.
REFERENCES:
patent: 3988689 (1976-10-01), Ochi et al.
patent: 4138649 (1979-02-01), Schaffer
patent: 4179670 (1979-12-01), Kingsbury
patent: 4246571 (1981-01-01), Gariazzo
patent: 4281318 (1981-07-01), Candy et al.
patent: 4400637 (1983-08-01), Klar et al.
patent: 4574250 (1986-03-01), Senderowicz
patent: 4633223 (1986-12-01), Senderowciz
patent: 4709375 (1987-11-01), Robinton et al.
patent: 4797845 (1989-01-01), Stikvoort
patent: 4851841 (1989-07-01), Sooch
patent: 4905005 (1990-02-01), Arribard et al.
patent: 4937577 (1990-06-01), Rich et al.
patent: 4939516 (1990-07-01), Early
patent: 4953117 (1990-08-01), Lagadec
patent: 4954824 (1990-09-01), Yamada et al.
patent: 4987373 (1991-01-01), Soo
patent: 4990911 (1991-02-01), Fujita et al.
patent: 4999798 (1991-03-01), McCaslin et al.
patent: 5030954 (1991-07-01), Ribner
patent: 5039989 (1991-08-01), Welland et al.
patent: 5047772 (1991-09-01), Ribner
patent: 5065157 (1991-11-01), Ribner et al.
patent: 5075679 (1991-12-01), Gazsi
patent: 5084639 (1992-01-01), Ribner
patent: 5084702 (1992-01-01), Ribner
patent: 5103229 (1992-04-01), Ribner
patent: 5111151 (1992-05-01), Ii
patent: 5111417 (1992-05-01), Belloc et al.
patent: 5119093 (1992-06-01), Vogt et al.
patent: 5121065 (1992-06-01), Wagner
patent: 5134401 (1992-07-01), McCartney et al.
patent: 5142286 (1992-08-01), Ribner et al.
patent: 5148166 (1992-09-01), Ribner
patent: 5148167 (1992-09-01), Ribner
patent: 5157395 (1992-10-01), Del Signore et al.
patent: 5159292 (1992-10-01), Canfield et al.
patent: 5159341 (1992-10-01), McCartney et al.
patent: 5181032 (1993-01-01), Ribner
patent: 5204827 (1993-04-01), Fujita et al.
patent: 5227707 (1993-07-01), Kurashima
patent: 5274375 (1993-12-01), Thompson
patent: 5283578 (1994-02-01), Ribner et al.
patent: 5311181 (1994-05-01), Ferguson, Jr. et al.
patent: 5313205 (1994-05-01), Wilson
patent: 5331346 (1994-07-01), Shields et al.
patent: 5334944 (1994-08-01), Hirakata
patent: 5349352 (1994-09-01), Saleh
patent: 5353026 (1994-10-01), Wilson
patent: 5357248 (1994-10-01), Sasaki
patent: 5363055 (1994-11-01), Ribner
patent: 5381148 (1995-01-01), Mueck et al.
patent: 5389923 (1995-02-01), Iwata et al.
patent: 5392043 (1995-02-01), Ribner
patent: 5410270 (1995-04-01), Rybicki et al.
patent: 5483555 (1996-01-01), Hattori
patent: 5497152 (1996-03-01), Wilson et al.
Bellanger, "Digital Processing of Signals", 1984, pp. 280-282.
Chao, Krik C.-H. et al., "A Higher Order Topology for Interpolative Modulators for Oversampling A/D Converters", 8090 IEEE Transactions on Circuits and Systems, 37 (1990) March, No. 3, New York, US.
Craig, "Input Circuit for Analog-To-Digital Light Sensitive Detector", IBM Technical Disclosure Bulletin, Vo. 22, No. 1, Jun. 1979.
"Designer's Reference Manual", Analog Devices Inc. Norwood, Ma, 1996; Section 2, pp. 43-44 and 103-104.
Elliot, Douglas F. & Ramamohan, Rao K., "Fast Transforms, Algorithms, Analyses, Applications", Academic Press, p. 13, 1982.
Gray, Paul R. & Meyer, Robert G., "Analysis and Design of Analog Integrated Circuit, Second Edition by John Wiley & Sons, Inc.," pp. 737-741, 1984.
Hallgreen, B., "Possible Applications of the Signal Delta Digitizer in Particle Physics", Nuclear Instruments and Methods in Physics Research A307 (1991) pp. 436-447.
Higgins, Richard J., "Digital Signal Processing in VLSI", Prentice Hall, Englewood Cliffs, NJ, pp. 29-31, 1990.
Hurst, Paul J. et al., "A Programmable Clock Generator Using Noise Shaping and its Application in a Switched-Capacitor Filter", Solid-State Circuits Research Laboratory, Dept. of Electrical and Computer Engineering University of California, Davis (no dated).
Janssen, J. et al., "A New Principle/IC for Audio Sampling Rate Conversion", Audio Engineering Society, Presented at the 96th Convention Feb. 26-Mar. 1, 1994, in Amsterdam.
Lee, Wai Laing, "A Novel Higher Order Interpolative Modulator Topology for High Resolution Oversampling A/D Converters", Thesis, Massachusetts Institute of Technology, Jun. 1987.
Leung, Bosco, H., "Design Methodology of Decimation Filters for Oversampled ADC Based on Quadratic Programming", IEEE Transactions on Circuits and Systems, vol. 38, No. 10, Oct. 1991.
Lindsey, William C., "A Survey of Digital Phase-Locked Loops", Proceedings of the IEEE, vol. 69, No. 4, Apr. 1981.
Martins R.P. & France, J.E., "A Novel N-TH Order IIRR Switched-Capacitor Decimator Building Block with Optimum Implementation", CH2692-2/89/0000-1471, 1989.
Nagaraj, K. et al., "Reduction of Finite-Gain Effect in Switched-Capacitor Filters", Electronics Letters, vol. 21, No. 15, Jul. 18, 1985.
Nakajima, Osamu et al., "Performance Improvement of DPLL with Adaptive Binary Quantized Phase-Frequency Comparator", Electronics Communications in Japan, Part 1, vol. 73, No. 8, Aug. 1990.
Ping, W. & Franca J.E., "New Form of Realisation of IIR Switched-Capacitor Decimators", Electronics Letters, vol. 29, No. 11 May 27, 1993.
Ribner, David B., et al.; "16b Third-Order Sigma Delta Modulator with Reduced Sensitivity to Nonidealities", ISSCC91, Paper WP 4.3, Digiest of papers, Mar. 1991.
Ribner, David B., et al., "Third-Order Sigma-Delta Modulator with Reduced Sensitivity to Nonidealities", IEEE Journal of Solid-State Circuits, vol. 26, No. 12, Dec. 1991.
Takashi, Tabu, "Gain Control System with Variable Sampling Frequency", Patent Abstracts of Japan, Dec. 1978.
Kester, W., "Sigma-Delta ADCs and DACs", Mixed-Signal Design Seminar, 1991, pp. VI-1-VI-30.
Kwan Tom W.
Lee Wai L.
Analog Devices Inc.
Mai Tan V.
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