Method of making a high voltage DMOS transistor

Details Method of making a high voltage DMOS transistor Method of making a high voltage DMOS transistor

1984-06-27

1986-12-02

Roy, Upendra

Metal treatment

Compositions

Heat treating

29571, 29576B, 148187, 148190, 148DIG82, 357 234, 357 91, H01L 2702, H01L 21265

Patent

active

046262938

ABSTRACT:
A process for manufacturing a high voltage DMOS (Deep Diffusion Metal Oxide Semiconductor) transistor includes a first ion implantation and drive-in step to form a P-well in a N-substrate, and a second such step to form a N+ region in this well and a channel between this region and the substrate and under a polysilicon gate which is covered with a silicon nitride layer during the first step. By the presence of the latter layer pitting of the gate is prevented and no leakage paths are formed between source and drain.

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patent: 4382826 (1983-05-01), Pfleiderer et al.
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patent: 4895390 (1975-07-01), Meiling et al.
Plummer et al. IEEE--Solid St. Circuits, SC-11 (1976) p. 809.
Mattheus in IEEE--Intl. Solid St. Circuit Conf., 1981, pp. 238-239.

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