Patent
1991-07-30
1992-03-10
Jackson, Jr., Jerome
357 41, 357 68, H01L 2710
Patent
active
050953524
ABSTRACT:
A semiconductor integrated circuit device of a standard cell system of this invention includes a cell array constituted by linearly arranging a plurality of cells each having a predetermined unit logical function. A Vcc power supply line and a GND power supply line are formed of a first aluminum layer, to supply a power supply voltage to the cells in the cell arrays. Power supply buses formed of a second aluminum layer are arranged on both the ends of the Vcc power supply line and the GND power supply line through a via hole, in a direction perpendicular to the Vcc power supply line and the GND power supply line. A Vcc power supply line and a GND power supply line formed of a third aluminum layer are arranged on the Vcc power supply line and the GND power supply line, at a central portion of the cell array, through a via hole, and extend in the same direction as the Vcc power supply lines and the GND power supply line, both mode of the first aluminum layer. Two systems of GND power supply lines allow a decrease in current density.
REFERENCES:
patent: 3808475 (1974-04-01), Buelow et al.
Song et al., "Power Distribution Techniques for VLSI Circuits," IEEE Journal of Solid-State Circuits, vol. SC21, No. 1, pp. 150-156, Feb. 1986.
Noda Makoto
Suda Kazuhiro
Dang Hung Xuan
Jackson, Jr. Jerome
Kabushiki Kaisha Toshiba
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