Microprocessor controlled display system

Details Microprocessor controlled display system Microprocessor controlled display system

1978-09-01

1980-12-02

Atkinson, Charles E.

Boots, shoes, and leggings

340750, 340799, G06F 314

Patent

active

042375436

ABSTRACT:
A display system for displaying information in response to an input video signal comprises a data control unit including a microprocessor and a microprogram memory for storing a program for the microprocessor, a refresh memory unit connected to the data control unit through an address bus and a data bus, and a video control unit for accessing display data stored in the refresh memory unit by a timing control unit to produce a video signal. The refresh memory unit comprises memories sectioned by byte, an I/O controller which receives a read/write control signal to indicate whether the access by the data control unit is read access or write access and an access memory specifying signal to indicate whether it is a one-byte memory access or a two-byte memory access to produce an I/O control signal, and a memory controller responsive to the I/O control signal to control data access to the two byte memories.

REFERENCES:
patent: 4011556 (1977-03-01), Tochitani et al.
patent: 4070710 (1978-01-01), Sukonick et al.
patent: 4075620 (1978-02-01), Passavant et al.
patent: 4092728 (1978-05-01), Baltzer
patent: 4103331 (1978-07-01), Thacker
patent: 4104624 (1978-08-01), Hamada
patent: 4129858 (1978-12-01), Hara
patent: 4129859 (1978-12-01), Iwamura et al.

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