MIS logic circuit of ratioless type

Details MIS logic circuit of ratioless type MIS logic circuit of ratioless type

1976-11-05

1978-01-17

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307200B, 307213, 307215, 307221C, 365104, 365185, 365203, H03K 1908, H03K 1920, G11C 1900

Patent

active

040694275

ABSTRACT:
An MIS logic circuit of a ratioless type comprising at least one logic section including one or more MIS FETs and provided with first and second electric energy suppressors which otherwise is fed back from output to input of the logic block through the gate-to-source capacitance and the gate-to-drain capacitance of the MIS FET. The first and second suppressors are connected with the drain and the source of the MIS FET respectively so that they are in series connection.

REFERENCES:
patent: 3518451 (1970-06-01), Booher
patent: 3541543 (1970-11-01), Crawford et al.
patent: 3678476 (1972-07-01), Ebertin
patent: 3702945 (1972-11-01), Faith et al.
patent: 3909674 (1975-09-01), Spence
patent: 3991326 (1976-11-01), Kawagoe et al.
patent: 3999081 (1976-12-01), Nakajima
patent: 4021781 (1977-05-01), Caudel

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