Circuit for stabilizing the rate at which pulses appear

Details Circuit for stabilizing the rate at which pulses appear Circuit for stabilizing the rate at which pulses appear

1987-06-19

1988-10-25

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Comparing counts

328134, 328155, 307527, H03K 526

Patent

active

047808950

ABSTRACT:
The circuit comprises two counters, one of which (A) operates at the irregular rate of asynchronous pulses applied to its count input (2), the other of which (B) operates at a regular rate which is not less than the average admissible rate for the asynchronous pulses, being clocked by an oscillator (5) providing pulses at a stable rate, a comparator (6) inhibiting the oscillator (5) each time the counter (B) catches up the counter (A) and a catch-up preventing control logic circuit (9) inhibiting the counter (A) whenever it tends to catch up the counter (B).

REFERENCES:
patent: 3164777 (1985-05-01), Guanella
patent: 3720910 (1973-03-01), McLaughlin et al.
patent: 4089060 (1978-05-01), Mitchell
patent: 4345211 (1982-08-01), Longworth
patent: 4606058 (1986-08-01), Kruger et al.
patent: 4628269 (1986-12-01), Hunninghaus et al.
patent: 4639680 (1987-01-01), Nelson
IBM Technical Bulletin, "Cycle-Synchronized Phase-Locked Loop, vol. 23, No. 1, pp. 81-82, Carnes & Weythman.

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