Patent
1974-04-08
1977-04-05
Edlow, Martin H.
357 23, 357 42, 357 49, 357 50, 357 59, H01L 2702, H01L 2712
Patent
active
040165949
ABSTRACT:
A semiconductor device having at least an insulated gate field effect transistor. According to the invention, the device comprises a first semiconductor region of a first conductivity type, an inset insulating pattern in a surface of said semiconductor region, a second region of the second conductivity type surrounded by said pattern, and source and drain zones of the first conductivity type which adjoin the insulating pattern. Said field effect transistor is preferably combined with a complementary field effect transistor provided beside it in the first region. The invention also comprises a very advantageous method of manufacturing said structure in which the insulating pattern and the gate electrodes serve as masks.
REFERENCES:
patent: 3327182 (1967-06-01), Kisinko
patent: 3391023 (1968-07-01), Frescura
patent: 3405329 (1968-10-01), Loro et al.
patent: 3590342 (1971-06-01), Jekat
patent: 3609479 (1971-09-01), Lin et al.
patent: 3648125 (1972-03-01), Peltzer
patent: 3673471 (1972-06-01), Klein et al.
patent: 3786318 (1974-01-01), Momoi et al.
Electronics, Mar. 1, 1971, pp. 52-55, article by Peltzer et al.
Appels et al., Philips Res. Repts. 25, pp. 118-1320, Apr., 1970.
Edlow Martin H.
Oisher Jack
Trifari Frank R.
U.S. Philips Corporation
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