Method for producing a semiconductor wafer having shallow and de

Details Method for producing a semiconductor wafer having shallow and de Method for producing a semiconductor wafer having shallow and de

1992-06-22

1993-08-03

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437193, 437200, 437228, H01L 2144, H01L 2148

Patent

active

052328740

ABSTRACT:
This invention relates to a semiconductor processing method for producing a semiconductor wafer having shallow buried contacts in a first region of the wafer and deep buried contacts in a second region of the wafer. The method, in it preferred form, includes: (a) defining first and second active areas of a substrate in the respective first and second regions; (b) providing first conductive runners over the wafer in the first and second regions; (c) providing both second conductive runners and conductive etch stop platforms in the second region from a single second conductive layer, wherein the etch stop platforms electrically contact corresponding second active areas in the second region; (d) providing an insulative layer over the wafer with an upper surface which is elevationally higher relative to the second active areas in the second region as compared to the first active areas in the first region; (e) patterning and etching the insulative layer to provide first contact openings which extend to the first active areas in the first region of the substrate, and second contact openings which extend to the conductive etch stop platforms provided above the second active areas in the second region; and (f) providing a third conductive layer over the insulative layer and into the first and second contact openings to electrically contact the first active areas in the first region and the etch stop layer in the second region.

REFERENCES:
patent: 4329706 (1982-05-01), Crowder et al.
patent: 4966865 (1990-10-01), Welch et al.
patent: 5017507 (1991-05-01), Miyazawa
patent: 5057447 (1991-10-01), Paterson
patent: 5194404 (1993-03-01), Nagatouro

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