Method for producing a buried junction memory device

Metal working – Method of mechanical manufacture – Assembling or joining

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148 15, 148187, 357 24, H01L 2126

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active

041352890

ABSTRACT:
A method for making a metal oxide semiconductor field effect transistor (MOSFET) is disclosed that results in a semiconductor device structure in which the source and drain regions are buried in the structure beneath a typically thick oxide and bulge out in the semiconductor underneath, but not contiguous with, the interface of a typically thin gate oxide with the semiconductor. This bulging of the buried drain, in an N-channel device, results in an electric field profile during operation which curves away from the interface in the neighborhood of the drain, thereby reducing deleterious transport of electrons from the channel to the gate oxide. The method can also be adapted for fabricating integrated memory cell arrays. This adaptation involves the implantation of one or more layers of dopant ions in the region of the semiconductor between the oxide interface and the bulging portion of the buried drain. The purpose of these layers is to control access of charge carriers to the surface and to control the charge storage properties of the surface region.

REFERENCES:
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patent: 3615956 (1971-10-01), Irving et al.
patent: 3676715 (1972-07-01), Brojdo
patent: 3752711 (1973-08-01), Kooi et al.
patent: 3783047 (1974-01-01), Paffen et al.
patent: 3873371 (1975-03-01), Wolf
patent: 3873372 (1975-03-01), Johnson
patent: 3936857 (1976-03-01), Ota
patent: 3982264 (1976-09-01), Ishitani
Applied Physics Letters, vol. 27, No. 3, Aug. 1975, pp. 147 and 148.
Applied Physics Letters, vol. 29, No. 3, Aug. 1976, pp. 198-200.

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