Multiplexor with decoding

Details Multiplexor with decoding Multiplexor with decoding

1979-10-31

1982-10-12

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

307243, H04J 302

Patent

active

043542662

ABSTRACT:
Multiplexor with internal decoding. Signal levels at two select input terminals select the data input at one of four data input terminals to be applied to an output terminal. The multiplexor includes three sets of pairs of transistors connected in a series arrangement. In one embodiment the current source for the transistors includes a resistance and diode in parallel connected between ground and the transistors of the third set and a resistance connected between a source of negative potential and the transistors of the first set. In another embodiment the current source includes a dual emitter transistor biased to operate as a constant current source connected between the source of negative potential and the transistors of the first set in place of the resistance.

REFERENCES:
patent: 3639781 (1972-02-01), Marley
patent: 3783307 (1974-01-01), Breuer
patent: 4157589 (1979-06-01), Kapral et al.
MECL Integrated Circuits Data Book, Motorola Semiconductor Products Inc., Sep. 1973, pp. 5-75.

Affiliated with

Also associated with

Rating

Multiplexor with decoding does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiplexor with decoding, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplexor with decoding will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-226456