Image processing memory integrated circuit

Television – Image signal processing circuitry specific to television – With details of static storage device

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Details

348715, 348718, 348584, H04N 964

Patent

active

055283152

ABSTRACT:
An image processing memory integrated circuit used for a signal processing circuit is disclosed. In the bidirectional prediction, pixel values for two-frame images are stored in a memory cell array. The stored pixel values are read on the basis of address of two-dimensional block. The read pixel values of the two images in the block are added by an adder at an appropriate ratio. The resulting inter-image prediction signal and the interpolation signals are outputted to the outside. In the unidirectional prediction, pixel values for one-frame images are stored in a memory cell array. From the memory cell array, pixel values of two-dimensional block expanded from the above-mentioned block are read. The read pixel value is adaptively added to the pixel value delayed by a predetermined number of pixel from the read pixel value through an adder at an appropriate ratio.

REFERENCES:
patent: 4982285 (1991-01-01), Sugiyama
patent: 4985768 (1991-01-01), Sugiyama
patent: 5150458 (1992-09-01), Masuzaki
patent: 5317397 (1994-05-01), Odaka

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