Method and apparatus for numerically controlled oscillator with

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364721, G06F 102

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056732120

ABSTRACT:
A numerically controlled oscillator (NCO) (10) or direct digital synthesizer (DSS) includes a phase accumulator (12, 28, 30), a phase to amplitude converter (24), and a digital to analog converter (26). The phase accumulator is partitioned into a high speed phase accumulator stage (44) and a low speed phase accumulator stage (46). The high speed stage (44) performs modulo accumulation on the most significant N.sub.M bits of the entire phase word. The low speed stage (46) performs modulo accumulation on the least significant N.sub.L bits of the entire phase word. The low speed stage (46) supplies a carry signal to the high speed stage (44). The low speed stage (46) operates with an accumulation period that is 2.sup.X times slower than the accumulation period for the high speed stage (44). A phase output is taken from the most significant N.sub.p of the N.sub.M bits accumulated in the high speed stage (44), where desirably N.sub.M .gtoreq.N.sub.p +X.

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An article entitled "A 150-MHz Direct Digital Frequency Synthesizer in 1.25-um CMOS with -90-dBc Spurious Performance" by H. T. Nicholas, III et al., IEEE Journal of Solid-State Circuits, vol. 26. No. 12, Dec. 1991, pp. 1959-1969.
A catalog entitled "ASIC & Custom Products--Short Form Catalog", Published by Stanford Telecommunication, Inc., ASIC & Custom Products Division, .COPYRGT.1993, Stanford Telecommunications, Inc., Aug., 1993.

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