1976-02-13
1977-04-05
Weldon, Ulysses
58 855, G04C 300
Patent
active
040154190
ABSTRACT:
To facilitate acceleration or deceleration of the stepping rate of a time-keeping counter responding to driving pulses from a frequency divider connected to a crystal-controlled oscillator, a succession of such driving pulses is taken from an OR gate with inputs receiving a basic pulse train .phi..sub..gamma. a normally present first ancillary pulse train .phi..sub..beta. spacedly interleaved with pulse train .phi..sub..gamma. and a normally absent second ancillary pulse train .phi..sub..alpha. with pulse positions offset from those of the other two pulse trains. To retard the timepiece, the pulses of train .phi..sub..beta. are blocked for a desired period; to advance it, pulses of train .phi..sub..alpha. are interpolated at a rate depending on the cadence of a series of control pulses selectively synthesized from a combination of low-frequency stage outputs of the frequency divider. Externally set selection signals are temporarily stored in a memory circuit including NOR gates with positive-feedback connections to inverting inputs thereof, the memory circuit being periodically tested by a resetting pulse recurring at a frequency lower than that of the driving pulses.
REFERENCES:
patent: 3757510 (1973-09-01), Dill
patent: 3777471 (1973-12-01), Koehler et al.
patent: 3834152 (1974-09-01), Nishimura et al.
patent: 3895486 (1975-07-01), Hammer et al.
Hashimoto Yukio
Morokawa Shigeru
Citizen Watch Co. Ltd.
Dubno Herbert
Montague Ernest G.
Ross Karl F.
Weldon Ulysses
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