Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Patent
1996-06-13
1997-09-30
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
257701, 257706, 257707, 257730, H01L 2348, H01L 2352
Patent
active
056729103
ABSTRACT:
It is an object to downsize a device while maintaining a high breakdown voltage. An external terminal (7) protrudes to the outside from the side wall of a sealing resin (2) and a heat sink (1) is exposed in the bottom of the sealing resin (2). A step surface (21) retracted from the exposed surface of the heat sink (1) is formed in the part of the sealing resin (2) surrounding the periphery of the heat sink (1). When using this semiconductor device, the exposed surface of the heat sink (1) is brought into surface contact with the flat surface (41a) of the radiation fin (41) and an insulation sheet (31) is interposed between the step surface (21) and the flat surface (41a), and which is pressed therebetween. The insulation sheet (31) is disposed to cover the region facing the external terminal (7) in the flat surface (41a). Accordingly, it is possible to set the height of the external terminal (7) from the exposed surface of the heat sink (1) lower than the spatial distance determined on the basis of the rated voltage while keeping the breakdown voltage between the external terminal (7) and the radiation fin (41) as the rated voltage.
REFERENCES:
patent: 5019942 (1991-05-01), Clemens
patent: 5063434 (1991-11-01), Emoto
Iwagami Tooru
Kawafuji Hisashi
Majumdar Gourab
Mori Satoshi
Noda Sukehisa
Crane Sara W.
Mitsubishi Denki & Kabushiki Kaisha
Wille Douglas
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