Fishing – trapping – and vermin destroying
Patent
1995-03-30
1997-09-30
Niebling, John
Fishing, trapping, and vermin destroying
437 52, 437 67, H01L 218247, H01L 21265
Patent
active
056725299
ABSTRACT:
A method of manufacturing a nonvolatile semiconductor memory device which is protected against deterioration in the electron injection/discharge characteristics between a floating gate of a memory cell and a channel. Three layers including a gate oxide film, a first polysilicon layer and a first nitride film are sequentially deposited on a silicon substrate surface and patterned with stripe-like columnwise lines. A second nitride film is formed on side walls of the columnwise lines, respectively. An element isolating insulation film is formed on the silicon substrate surface which is not covered with the first and second nitride films. After removal of the first and second nitride films, a first insulation film is formed on the side walls of the first polysilicon layer. Subsequently, at least two layers including a second insulation film and a second polysilicon layer are deposited and a pattern of rowwise lines extending orthogonally to the columnwise lines are formed by processing correspondingly the second polysilicon layer. Even after formation of the element isolating insulation film, thickening of the gate oxide film at distal portions thereof can be suppressed, whereby variations and deterioration in the characteristic of electron injection based on hot electron and tunnel phenomena can be minimized.
REFERENCES:
patent: 5384272 (1995-01-01), Ibok et al.
patent: 5397725 (1995-03-01), Wolstenholme et al.
patent: 5432110 (1995-07-01), Inoue
Adachi Tetsuo
Kato Masataka
Kume Hitoshi
Shukuri Shoji
Booth Richard A.
Hitachi , Ltd.
Niebling John
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