Fishing – trapping – and vermin destroying
Patent
1996-03-08
1997-09-30
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 44, 437 56, 437 58, 257356, H01L 21336
Patent
active
056725272
ABSTRACT:
A process for fabricating ESD protection circuit has been developed, in which decreased cycle time has been achieved via a reduction in photomasking steps. The present invention process features the use of only one photo mask to form ESD protection circuit without the saliside and the LDD structure. The method of present invention needs only one mask instead of several masks as in a conventional process to create the ESD protection circuit during the salicide process of the MOSFET.
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United Microelectronics Corp.
Wilczewski Mary
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