Programmable burst length DRAM

Details Programmable burst length DRAM Programmable burst length DRAM

1997-04-04

1999-04-20

Elmore, Reba I.

Excavating

371 4014, 371 4017, 371 404, 371 402, 39518204, 39518206, G11C 2900

Patent

active

058964045

ABSTRACT:
A Dynamic Random Access Memory (DRAM) with a burst length programmable as eight (8) or nine (9) bytes. The DRAM array is divided into two or more sub-arrays, with sub-array cells arranged in addressable rows and columns. When the DRAM is programmed in Normal mode, the burst length is 8 and the entire array address space is available for data storage. When the DRAM is programmed for error checking (ECC mode), the burst length is nine and the array is reconfigured with part of the array providing the ninth byte. The DRAM's address space is reduced by one-eighth in ECC mode. Preferably, all nine locations are in the same page, with each page being divided into eight equal portions. In Normal mode all eight equal portions are data storage; and, in ECC mode, seven-eighths of the page is data storage, the remaining one eighth being assigned to check bit storage.

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