Process to optimize performance and reliability of MOSFET device

Details Process to optimize performance and reliability of MOSFET device Process to optimize performance and reliability of MOSFET device

1995-08-03

1998-03-03

Thomas, Tom

Fishing, trapping, and vermin destroying

437 41RLD, 437913, H01L 218234

Patent

active

057233527

ABSTRACT:
A process for fabricating MOSFET devices, in which performance, as well as reliability enhancements, are included, has been developed. An LDD process, using first an ion implanted phosphorous step, to address hot carrier lifetime phenomena, followed by a arsenic ion implantation step, used to improve device performance, is described.

REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 5089432 (1992-02-01), Yoo
patent: 5091763 (1992-02-01), Sanchez
patent: 5151376 (1992-09-01), Spinner, III
patent: 5393685 (1995-02-01), Yoo et al.
patent: 5472895 (1995-12-01), Park
patent: 5476803 (1995-12-01), Liu

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