Semiconductor integrated circuit with low-noise output buffers

Details Semiconductor integrated circuit with low-noise output buffers Semiconductor integrated circuit with low-noise output buffers

1992-04-15

1993-08-17

Ng, Jin F.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307572, H03K 329, H03K 17687

Patent

active

052372138

ABSTRACT:
A semiconductor integrated circuit has output buffers connected in parallel between one or more upper potential lines and one or more lower potential lines. Each output buffer has an output terminal coupled by first and third switching circuits to upper potential lines, and by second and fourth switching circuits to lower potential lines. In the high output state the first switching circuit is switched on, then the third switching circuit is switched on. In the low output state the second switching circuit is switched on, then the fourth switching circuit is switched on. An upper voltage threshold element switches the first switching circuit off above a first threshold output potential. A lower voltage threshold element switches the second circuit off below a second threshold output potential.

REFERENCES:
patent: 4818901 (1989-04-01), Young et al.
patent: 4961010 (1990-10-01), Davis
patent: 5003205 (1991-03-01), Kohda et al.
patent: 5057711 (1991-10-01), Lee et al.
patent: 5063308 (1991-11-01), Borkar
patent: 5097149 (1992-03-01), Lee

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