Fishing – trapping – and vermin destroying
Patent
1992-08-10
1993-08-17
Fourson, George
Fishing, trapping, and vermin destroying
437 69, H01L 2176
Patent
active
052368610
ABSTRACT:
A method of manufacturing a metal-insulator-semiconductor (MIS) device in which a gate electrode is formed to cover the upper portion of a device forming region which is isolated by a trench is comprised of a step of forming a laminated film including at least an oxidation proof film on a substrate, a step of selectively removing parts of the laminated film and a part of the substrate beneath the laminated film to thereby form a trench in the substrate, a step of burying an insulation film in the trench, and a step of performing a selective oxidation on the entire surface of the insulation film.
REFERENCES:
Wolf, S., et al, Silicon Processing for the VLSI Era, vol. 2, 1990, pp. 51-58 & 419-426.
Fourson George
Sony Corporation
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