Stacked V-cell capacitor using a disposable outer digit line spa

Details Stacked V-cell capacitor using a disposable outer digit line spa Stacked V-cell capacitor using a disposable outer digit line spa

1990-11-06

1993-08-17

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 52, 437 60, 437919, H01L 2170, H01L 21265

Patent

active

052368556

ABSTRACT:
A stacked v-cell (SVC) capacitor using a modified stacked capacitor storage cell fabrication process. The SVC capacitor is made up of polysilicon structure, having a v-shaped cross-section, located at a buried contact and extending to an adjacent storage node overlaid by polysilicon with a dielectric sandwiched in between. The addition of the polysilicon structure increases storage capability 70% without enlarging the surface area defined for a normal stacked capacitor cell.

REFERENCES:
patent: 4981810 (1991-01-01), Fazan et al.
patent: 5015595 (1991-05-01), Wollesen
patent: 5037777 (1991-08-01), Mele et al.
patent: 5049517 (1991-09-01), Liu et al.
patent: 5071781 (1991-12-01), Seo et al.
patent: 5071783 (1991-12-01), Taguchi et al.
patent: 5128273 (1992-07-01), Ema
Ema et al. "3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS" IEDM, 1985 pp. 592-595.
Inoue et al. "A Spread Stacked Capacitor (SSC) Cell for 64MBit DRAMS," IEDM, Dig. Tech. Papers, pp. 31-34, 1989.

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