Microprocessors

Details Microprocessors Microprocessors

1986-06-13

1988-04-05

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1212

Patent

active

047362901

ABSTRACT:
A microprocessor that has two operating modes for generating memory location addresses includes a processor 20 connected to a read-only memory 21, a random access memory 22, and an I/O unit 23 through control 25, data 26 and address 27 buses. A remapper unit 24 is connected in the address bus between the processor 20 and the read only memory and the random access memory so that when it is enabled by a signal from the I/O unit it can selectively change addresses generated by the processor and thus redirect the control of the microprocessor.

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