Excavating
Patent
1996-07-11
1997-09-16
Canney, Vincent P.
Excavating
39518306, G06F 1100
Patent
active
056688172
ABSTRACT:
A self-testable Digital Signal Processing (DSP) integrated circuit is described, using a Built-In Self Test (BIST) scheme suitable for high performance DSP datapaths. The BIST session is controlled via hardware without the need for a separate test pattern generation register or test program storage. Furthermore, the BIST scenario is appropriately set-up so as to also test the register file as well as the shift and truncation logic in the datapath. The use of DataPath-BIST enables a very high speed test (one test vector is applied per clock cycle) with no performance degradation and little area overhead for the hardware test control. Comparison between DP-BIST and scan-based BIST technique is also presented. DP-BIST is used a centralized test resource to test other macros on the chip and the integration of DP-BIST with internal scan and boundary scan is addressed.
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Canney Vincent P.
de Wilton Angela C.
Northern Telecom Limited
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