Thin film metal interconnects in integrated circuit structures t

Details Thin film metal interconnects in integrated circuit structures t Thin film metal interconnects in integrated circuit structures t

1991-09-09

1992-06-02

James, Andrew J.

Fishing, trapping, and vermin destroying

357 71, 437180, H01L 2348

Patent

active

051191709

ABSTRACT:
A method of forming thin film metal interconnects employed in integrated circuit structures comprising the step of laying out the interconnects so that the patterned interconnects have a relationship of interconnect width, L, and interconnect spatial separation, S, so that S>1 .mu.m>L. In particular, line width, L, is equal to or less than 0.8 .mu.m, spatial separation, S, is in the range of 1.0 .mu.m to 1.2 .mu.m and interconnect thickness, T.sub.A1, is about 0.5 .mu.m thereby providing effective optimization in the amount of reduction in interconnect spatial capacitance resulting in increased operation speed of the integrated circuit structure.

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