Semiconductor memory device with dielectric isolation

Details Semiconductor memory device with dielectric isolation Semiconductor memory device with dielectric isolation

1990-11-29

1992-06-02

Hille, Rolf

357 55, 357 49, 357 237, H01L 2968, H01L 2906, H01L 2712, H01L 2701

Patent

active

051191555

ABSTRACT:
In a semiconductor memory device, a trench is formed in a surface of a memory cell forming region of the substrate. The overall surface of the memory cell forming region, inclusive of the inner wall of the trench, is covered with an insulator film. A capacitor is formed on the inner surface of the trench through the insulator film. A MOSFET is formed in a semiconductor layer formed on a surface of a flat portion of the substrate. One of the source and drain regions of the MOSFET reaches the periphery of the trench so as to be connected to a storage node electrode of the capacitor.

REFERENCES:
patent: 4791610 (1988-12-01), Takemae
patent: 5021842 (1991-06-01), Koyanagi

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