High speed phase-lock loop device

Details High speed phase-lock loop device High speed phase-lock loop device

Filed on

1991-05-23

Date issued

1992-06-02

Examiner

Callahan, Timothy P.

Patent Class

Electrical transmission or interconnection systems

SubClass

Nonlinear reactor systems

SubSubClass

Parametrons

Other Related Categories

328 63, 307262, 307269, 375120, H03K 513, H03K 522

Type

Patent

Status

active

Patent number

051190370

Description

ABSTRACT:
A phase-lock loop device for phase locking a device input signal representing a first complex number and having a device input phase which should be locked into a locked phase, includes the following. A first complex multiplier to calculate a first product of the first complex number and a first conjugate complex number to produce a first complex product signal. The first conjugate complex number is represented by a first conjugate signal which is produced by delaying and processing the device input signal. A second complex multiplier to calculate a second product of a phase processed signal and a multiplier input signal to produce a second complex product signal. The phase processed signal is produced by filtering and processing the first complex product signal. The multiplier input signal is produced by delaying and limiting the second complex product signal. A third complex multiplier to calculate a third product of the first complex number and a second conjugate complex number to produce a third complex product signal. The second conjugate complex number is represented by a second conjugate signal which is produced by processing the second complex product signal. A fourth complex multiplier to calculate a fourth product of the second complex product signal and a filtered signal to produce a fourth complex product signal having the locked phase. the filtered signal is produced by filtering the third complex product signal.

REFERENCES:
patent: 4924188 (1990-05-01), Akazawa et al.

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