Static information storage and retrieval – Floating gate – Particular biasing
Patent
1996-03-05
1997-09-16
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
36518516, G11C 700
Patent
active
056687583
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to wordline drivers used in memory arrays which are capable of driving both positive and negative voltages on the wordlines; and more particularly to flash EEPROM devices which apply a negative voltage to individual wordlines during a program mode, and a positive voltage to individual wordlines during a read mode.
2. Description of Related Art
In nonvolatile semiconductor memory devices known as flash EEPROM, positive and negative voltages are used to read and write data into the nonvolatile memory array. The writing of data into the nonvolatile memory array for flash EEPROM devices involves processes known as the program and erase modes. The erase mode involves setting an entire array, or at least a sector of an array, to a single state, in which either all of the cells in the array (or sector) have a low threshold or all of the cells in the array (or sector) have a high threshold. Whether the erased state is a high threshold state, in which the floating gate of the flash EEPROM cell is charged or a low threshold state in which the floating gate is discharged, depends on the particular implementation of flash memory. The programming mode involves charging or discharging the floating gate of individual addressed cells in the array to establish the opposite threshold level with respect to the erased state.
It is well known that in order to discharge the floating gate, it is advantageous to apply a negative voltage to the wordline for the cell to be discharged. This assists in driving electrons out of the floating gate into the source or drain regions of the cell, which are biased to a positive level to attract the electrons. However, circuitry for applying a negative voltage to a wordline presents some difficulties.
Wordline drivers must be capable of driving a positive voltage during a normal read mode for the device to selected wordlines in response to decoded addresses. It has proved difficult in the prior art to provide a wordline driver with the simple circuitry that can also apply a negative voltage to selected the wordlines. Prior systems for applying negative voltages to the wordlines have overridden the decoding function which drives the wordline driver, making it impossible to selectively apply negative voltages to individual wordlines. See, for instance, European Patent Application No. 92112727.0 entitled NON-VOLATILE SEMI-CONDUCTOR MEMORY DEVICE HAVING ROW DECODER, invented by Atsumi, et al. (Publication No. 0 525 678 A2); and European Patent Application No. 92830115.9, entitled DECODER CIRCUIT CAPABLE OF TRANSFERRING POSITIVE AND NEGATIVE VOLTAGES, invented by Gastaldi (Publication No. 0 559 995 A1). In both of these European patent applications, a wordline driver is disclosed which provides a positive voltage to selected wordlines for normal read mode operations, but overrides the selecting function of the decoder during an erasing mode to apply a negative voltage to all wordlines. Negative wordline voltages are not used during programming in these references. Because the decoding function is overridden, the negative wordline voltage cannot be applied during a program mode that relies on the decoding function.
When it is necessary to apply a negative voltage during a program mode to reduce high voltage requirements on the source and/or drain in flash EEPROM, the design of the wordline driver becomes difficult. Thus, for instance, separate drivers, one for positive voltage and one for negative voltage, at opposite ends of the wordline and each coupled to the decoding circuit have been used. For instance, Arakawa, U.S. Pat. No. 5,136,541, entitled PROGRAMMABLE READ ONLY MEMORY USING STACKED-GATE CELL ERASABLE BY HOLE INJECTION, and Arakawa, U.S. Pat. No. entitled 5,253,200 ELECTRICALLY ERASABLE AND PROGRAMMABLE READ ONLY MEMORY USING STACKED-GATE CELL, describe a system for driving a wordline with a positive and negative voltage based on the use of separate drivers. (See, for instance, FIG. 3 of Arakawa's U.S. P
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Cheng Yao-Wu
Dang-hsing Yiu Tom
Hung Chun-Hsiung
Kamei Teruhiko
Wan Ray-Lin
Macronix Int'l Co., Ltd.
Popek Joseph A.
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