Method for manufacturing MOS type semiconductor devices

Details Method for manufacturing MOS type semiconductor devices Method for manufacturing MOS type semiconductor devices

1991-07-30

1992-06-02

Quach, T. N.

Fishing, trapping, and vermin destroying

437 29, 437 44, 437150, 437158, 437228, 437986, 148DIG126, 385 234, H01L 21336

Patent

active

051186381

ABSTRACT:
A method for manufacturing a MOS type semiconductor device includes the sequential introduction of base and source layer region impurities in a base layer of a second conductivity type, disposed in a semiconductor drain layer of a first conductivity type. The sequential introduction steps include forming an insulating layer on the surface of the semiconductor drain layer and on a gate electrode, introducing ions of the second conductivity type impurity into the base layer to form a low resistivity base layer region in the base layer while using the insulating layer as a mask, isotropically etching the insulating layer to reduce the initial thickness of the insulating layer and the width of the sidewall which overlaps the resultant low resistivity base layer region until the sidewall of the insulating layer no longer overlaps an edge of the low resistivity base layer region, and introducing ions of the first conductivity type impurity into the base layer to form a source layer while a resist mask and the insulating layer covering the gate electrode mask a portion of the base layer. As a result of the formation steps, an edge of the low resistivity base layer region can be precisely positioned near an edge of the source layer facing the channel side and thus, the parasitic transistor hardly becomes conductive because its base resistance is reduced greatly.

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