Method of making self-aligned memory MNOS-transistor

Details Method of making self-aligned memory MNOS-transistor Method of making self-aligned memory MNOS-transistor

1982-06-07

1984-06-26

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 148 15, 148187, 357 23, 357 91, H01L 2702, H01L 2126

Patent

active

044557426

ABSTRACT:
A method is described for positioning the variable threshold region of a memory transistor by a predetermined distance from the drain and source regions. The method includes providing openings in the dielectric material over the substrate at the same time or in one mask step for the variable threshold region and the drain and source regions. A mask is positioned over the variable threshold region opening at times the drain and source regions are formed. The variable threshold region is subsequently formed by growing thin oxide and a layer of nitride thereover. Both sides of the variable threshold region have a fixed threshold region between the respective drain and source which is controlled by a common gate electrode. The invention overcomes the problem of providing additional space for alignment tolerances between the variable threshold region and the drain and source regions.

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